VLSI Design (Record no. 2178)
[ view plain ]
| 000 -LEADER | |
|---|---|
| fixed length control field | 03362nam a22002417a 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | OSt |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20190523155606.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 190523b ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 978-0-19-809486-8 |
| 028 ## - PUBLISHER NUMBER | |
| Source | Allied Informatics, Jaipur |
| Bill Number | 6195 |
| Bill Date | 20/05/2019 |
| Purchase Year | 2019-20 |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | BSDU |
| Language of cataloging | English |
| Transcribing agency | BSDU |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 |
| Item number | DAS |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Das, Debaprasad |
| 245 ## - TITLE STATEMENT | |
| Title | VLSI Design |
| 250 ## - EDITION STATEMENT | |
| Remainder of edition statement | 2nd |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | New Delhi |
| Name of publisher, distributor, etc. | Oxford University Press |
| Date of publication, distribution, etc. | 2015 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 626 |
| 500 ## - GENERAL NOTE | |
| General note | This second edition of VLSI Design is a comprehensive textbook designed for undergraduate students of electrical, electronics, and electronics and communication engineering. It provides a thorough understanding of the fundamental concepts and design of VLSI systems.<br/><br/>Beginning with an introduction to VLSI systems and basic concepts of MOS transistors, the book then proceeds to describe the various concepts of VLSI, such as the structure and operation of MOS transistors and inverters, standard cell library design and its characterization, analog and digital CMOS logic design, semiconductor memories, and BiCMOS technology and circuits. It then provides an exhaustive step-wise discussion of the various stages involved in designing a VLSI chip (which includes logic synthesis, timing analysis, floor planning, placement and routing, verification, and testing). In addition, the book includes chapters on FPGA architecture, VLSI process technology, subsystem design, and low-power logic circuits. |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE | |
| Bibliography, etc. note | Contents<br/>Chapter 1: Introduction to VLSI Systems<br/>Chapter 2: MOS Transistors<br/>Chapter 3: MOS Inverters<br/>Chapter 4: Standard Cell Library Design and Characterization<br/>Chapter 5: Analog CMOS Design<br/>Chapter 6: Digital CMOS Logic Design<br/>Chapter 7: Semiconductor Memories<br/>Chapter 8: BiCMOS Technology and Circuits<br/>Chapter 9: Logic Synthesis<br/>Chapter 10: Timing Analysis<br/>Chapter 11: Physical Design—Floorplanning, Placement, and Routing<br/>Chapter 12: Verification and Reliability Analysis<br/>Chapter 13: IC Packaging<br/>Chapter 14: VLSI Testing<br/>Chapter 15: Field Programmable Gate Array<br/>Chapter 16: VLSI Process Technology<br/>Chapter 17: Subsystem Design<br/>Chapter 18: Low Power Logic Circuits |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc. | Features<br/><br/>All the steps of VLSI design have been incorporated keeping in mind the industry perspective<br/>Terminologies used exclusively in the real design process are followed throughout the book<br/>Connection between VLSI design and CAD tools is also drawn in this book<br/>Different state-of-the-art electronic design automation (EDA) tools have been explained in detail<br/>Numerous review questions and unsolved problems provided as end-chapter exercises to help readers assess their understanding of the concepts discussed<br/>New to the Second Edition<br/>Chapters on MOS inverters, sub-system design, semiconductor memories, and low power logic circuits<br/>Sections on resonant tunnelling diodes, single electron transistors, spin transistors, ballistic electron devices, organic field effect transistors, carbon nanotubes, molecular transistors, small signal analysis of single-stage amplifiers, working principle of bistable circuits, and design of CMOS D flip-flops<br/>Revised and expanded coverage of topics such as PLD, Elmore delay model, Domino and NORA CMOS logic, and gate and device sizing |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Electronics |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Books |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Home library | Current library | Shelving location | Date acquired | Cost, normal purchase price | Total Checkouts | Full call number | Barcode | Date last seen | Cost, replacement price | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | BSDU Knowledge Resource Center, Jaipur | BSDU Knowledge Resource Center, Jaipur | General Stacks | 05/23/2019 | 550.00 | 621.395 DAS | 017772 | 02/12/2020 | 550.00 | 05/23/2019 | Books |