01879nam a2200229Ia 4500 338 338 0001003 OSt 20190111111127.0 170602s9999 xx 000 0 und d 9788126527854 2016 Allied Informatics, Jaipur English BSDU BSDU 004.33 CHE Cheng, Albert M K Real-Time Systems : Scheduling, Analysis and Verification Wiley India Pvt. Ltd. India New Delhi 2016,c2002 524 This book provides the most detailed coverage available of a key aspect of real-time systems, namely the verification and validation process. Performance validation results in specifications which a commercial manufacturer can guarantee to a user, and in the case of real time systems, this information is crucial. The book is intended for professionals and students in the subject, and will take an overview of several approaches to the problem, then describe in detail the advantages and disadvantages to each approach. This book should be a handy reference for practitioners in the field also, as this type of discussion exists nowhere else in the current literature. Contents: Preface. List of Figures · Introduction. · Analysis and Verification of Non-Real-Time Systems. · Real-Time Scheduling and Schedulability Analysis. · Model Checking of Finite-State Systems. · Visual Formalism, Statecharts, and Statemate. · Real-Time Logic, Graph-Theoretic Analysis, and Modechart. · Verification Using Timed Automata. · Timed Petri Nets. · Process Algebra. · Design and Analysis of Propositional-Logic Rule-Based Systems. · Timing Analysis of Predicate-Logic Rule-Based Systems. · Optimization of Rule-Based Systems. Bibliography. Index. CSE ddc BK 0 0 ddc 0 0 BSDU BSDU 2016-11-30 679.00 0 004.33 CHE 001003 2020-02-12 00:00:00 679.00 2017-06-02 BK 0 0 ddc 0 0 BSDU BSDU 2016-11-30 679.00 0 004.33 CHE 001004 2020-02-12 00:00:00 679.00 2017-06-02 BK 0 0 ddc 0 1 RB BSDU BSDU 2016-11-30 679.00 0 004.33 CHE 001005 2020-02-12 00:00:00 679.00 2017-06-02 BK 0 0 ddc 0 0 BSDU BSDU 2016-11-30 679.00 0 004.33 CHE 001006 2020-02-12 00:00:00 679.00 2017-06-02 BK 0 0 ddc 0 0 BSDU BSDU 2016-11-30 679.00 0 004.33 CHE 001007 2020-02-12 00:00:00 679.00 2017-06-02 BK