000			01005nam a2200217Ia 4500
999			_c248 _d248
001			0000757
003			OSt
005			20190328105746.0
008			170602s9999 xx 000 0 und d
020			_a9788131518489
028			_q2016 _bAllied Informatics, Jaipur
040			_bEnglish _aBSDU _cBSDU
082			_a621.395 _bLEE
100			_aLee, Sunggu
245		0	_aAdvanced Digital Logic Design : using verilog, State Machines and Synthesis for FPGAs
260			_bCengage Learning India Pvt. Ltd _a New Delhi _c2012,c2006
300			_a462
504			_aContents : 1.Condensed Overview of Introductory Digital Logic Design 2.Digital Logic Design Using hardware Description languages 3.Introduction to Verilog and Test Benches 4.High-Level Verilog Coding for Synthesis 5.State Design 6.FPGA and Other Programmable Logic Devices 7. Design of a USB Protocol Analyzer 8.Design of Fast Artithmetic Units 9.Design of a Pipelined RISC Microprocessor
650			_aElectronics
942			_2ddc _cBK